HOMEVULNERABILITIESCVE-2025-63384
MEDIUM

CVE-2025-63384

CWE-266Published: November 10, 2025· Updated: Jun 17, 2026

6.5
CVSS v3.1

Official Description

A vulnerability was discovered in RISC-V Rocket-Chip v1.6 and before implementation where the SRET (Supervisor-mode Exception Return) instruction fails to correctly transition the processor's privilege level. Instead of downgrading from Machine-mode (M-mode) to Supervisor-mode (S-mode) as specified by the sstatus.SPP bit, the processor incorrectly remains in M-mode, leading to a critical privilege retention vulnerability.

NVD Source

Technical Analysis

CVE-2025-63384 can be exploited remotely over the network without requiring physical or adjacent access, significantly expanding the attack surface for threat actors.

Exploitation requires low privileges, which limits the exposure to scenarios where an attacker has already gained initial access.

A successful exploit results in complete confidentiality breach (data exposure), with a CVSS base score of 6.5.

CVSS v3.1 Vector Breakdown

Exploitability
Attack VectorNetwork
Attack ComplexityLow
Privileges Req.Low
User InteractionNone
ScopeUnchanged
Impact
ConfidentialityHigh
IntegrityNone
AvailabilityNone
CVSS:3.1/AV:N/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N

Affected Vendors & Products

chipsalliance1 product(s)
rocketchip
Source: NVD CPE · 1 total CPE entries

Exploit & PoC Resources

NO KNOWN EXPLOITNo public exploit confirmed at this time
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Official Patches & Advisories

All References (2)

Quick Facts

CVE IDCVE-2025-63384
CVSS Score6.5 / 10
SeverityMEDIUM
WeaknessCWE-266
CISA KEVNo
Affected1 vendor(s)
PublishedNov 10, 2025

Related CVEs (CWE-266)

Recommended Actions

  • Apply vendor patches immediately
  • Monitor CVE-2025-63384 in threat intel feeds
  • Review IDS/IPS signatures for exploitation attempts
Data sourced from NVD (NIST), CISA KEV, and EPSS (FIRST). Analysis generated by CTIWatch. CVE data is provided under the NVD usage policy.